How to build circuits using CMOS logic

I have been telling you for a while now that majority of the digital VLSI circuits is made using CMOS logic. It has been so long that CMOS is adopted as the basic method of building VLSI circuits and evidently it is going to last longer. So in this post I'll explain how a CMOS circuit operates, How to design circuits using CMOS logic, What are the pros and cons of CMOS logic.So let's start with the description of CMOS circuit operation.

Operation of CMOS circuits

Figure-1 shows how a CMOS circuit looks like. CMOS circuits have both NMOS and PMOS transistors. CMOS means Complementary Metal-Oxide Semiconductor transistors. The word "complementary" says that NMOS and PMOS operate complementary to each other. i.e when NMOS operates in ON(Saturation) state PMOS operates in OFF(Cutoff) state and viceversa. Every CMOS circuit can be divided into two seperate circuits, one near to supply voltage VDD which is called "Pull-up circuit" and another near to ground VSS which is called "Pull-down circuit".

The Pull-up circuit is made using PMOS transistors. We know that PMOS transistors are good conductors of logic 1, I have explained this in DC characteristics of pass transistor. Similarly the Pull-down circuit is made using NMOS transistors as NMOS are good in conducting logic 0. As we can see in Figure-1 both pull-up and pull-down circuits get the same inputs.

The primary operation of pull-up circuit is to pull the output to logic 1 i.e VDD voltage when the pull-down circuit is off. Similarly pull-down circuit is responsible to pull the output voltage to VSS(logic 0) when the pull-up circuit is off.

For example if the pull-up circuit is replaced by a single PMOS transistor and the pull-down circuit is replaced by a single NMOS transistor then a CMOS inverter is formed which is the basic building block of CMOS logic circuits. Visit CMOS inverter DC characteristics for understanding the operation a CMOS inverter.

Designing basic and compound gates using CMOS logic

I am going to explain how to design a CMOS circuit in a series of steps. Make sure all these steps are followed when you design a circuit.

Step 1: The output function of our circuit thas to be in (F)' form and not just F. If it is not in the required form consider a new function G = F' and build CMOS circuit for G and invert the output.

Let's say the given function is F = A+B (note that "+" refers to logical OR) we have to convert it to required form by applying De-Morgan's law i.e. 

F = (F')' 

F = ( (A+B)' )'

G = (A+B)'

Nothing complex right, simple boolean operations. Now we can see that we have converted our output function to our required format. Now our new function G = F' =  (A+B)'

Step-2: Now implement the pull-down logic first for our new function,G. Just follow two rules,

1. If two or more literals are OR-ed then the respective transistors should be parallel(Source to source and drain to drain).

2. If two or more literals are AND-ed then the respective transistors should be in series(source to drain).

Here in our example A and B are OR-ed so in the pull-down logic two transistors will be in parallel. The gate terminals of these two transistors are connected to A and B. Figure-2 shows the pull down network.

Step-3: This is the final and simple step. We have to reverse the rules of Step-2 for AND-ed and OR-ed literals and build pull up network using PMOS transistors. 

Now if we join the output of both pull-up and pull-down circuits the complete CMOS circuit is made for output function G(NOR), since we need a circuit for F(OR) we will give the output to a CMOS inverter.Thus we can implement CMOS circuits. Figure-3 shows the pull-up block and the complete CMOS circuit for function F.

So that's how we can design CMOS circuits for any function. Try for all basic gates AND, OR, XOR, XNOR, NAND, NOR and comment if you found any difficulty.

Pros and Cons of CMOS logic

CMOS logic is the most preferred logic in VLSI industry to build digital circuits because of the benefits that it provides. But as we all know nothing will come for free in the world so there are some cons also. Important point is that the pros dominate for CMOS logic. Before CMOS, circuits used to be designed using only NMOS transistors (NMOS logic,pseudo NMOS logic) but as the technology grew and the number of transistors in a chip increased power dissipated by transistors became so large that the chip was unable to handle such power. So here are the pros,

pros

• CMOS dissipate very less power compared to any other logic family.
• CMOS do not degrade output for both logic 0 and logic 1.
• CMOS circuits have very high fan-in and fan-out.
• Fabricating a CMOS chip is well established.
• CMOS cost of fabrication is very less.
• CMOS chips are very denser accumulating more number of transistors in a given silicon area.

cons

• For the same output function CMOS circuits take approximately 2 times more number of transistors than the NMOS counterpart.

That's it gyus, I hope this article have given you enough information about building CMOS circuits. feel free to post any comment or doubt in the comments section below.