How to build circuits using CMOS logic

I have been telling you for a while now that majority of the digital VLSI circuits is made using CMOS logic. It has been so long that CMOS is adopted as the basic method of building VLSI circuits and evidently it is going to last longer. So in this post I'll explain how a CMOS circuit operates, How to design circuits using CMOS logic, What are the pros and cons of CMOS logic.So let's start with the description of CMOS circuit operation.

Operation of CMOS circuits

Figure-1 shows how a CMOS circuit looks like. CMOS circuits have both NMOS and PMOS transistors. CMOS means Complementary Metal-Oxide Semiconductor transistors. The word "complementary" says that NMOS and PMOS operate complementary to each other. i.e when NMOS operates in ON(Saturation) state PMOS operates in OFF(Cutoff) state and viceversa. Every CMOS circuit can be divided into two seperate circuits, one near to supply voltage VDD which is called "Pull-up circuit" and another near to ground VSS which is called "Pull-down circuit".

The Pull-up circuit is made using PMOS transistors. We know that PMOS transistors are good conductors of logic 1, I have explained this in DC characteristics of pass transistor. Similarly the Pull-down circuit is made using NMOS transistors as NMOS are good in conducting logic 0. As we can see in Figure-1 both pull-up and pull-down circuits get the same inputs.

The primary operation of pull-up circuit is to pull the output to logic 1 i.e VDD voltage when the pull-down circuit is off. Similarly pull-down circuit is responsible to pull the output voltage to VSS(logic 0) when the pull-up circuit is off.

For example if the pull-up circuit is replaced by a single PMOS transistor and the pull-down circuit is replaced by a single NMOS transistor then a CMOS inverter is formed which is the basic building block of CMOS logic circuits. Visit CMOS inverter DC characteristics for understanding the operation a CMOS inverter.

Designing basic and compound gates using CMOS logic

I am going to explain how to design a CMOS circuit in a series of steps. Make sure all these steps are followed when you design a circuit.

Step 1: The output function of our circuit thas to be in (F)' form and not just F. If it is not in the required form consider a new function G = F' and build CMOS circuit for G and invert the output.

Let's say the given function is F = A+B (note that "+" refers to logical OR) we have to convert it to required form by applying De-Morgan's law i.e. 

F = (F')' 

F = ( (A+B)' )'

G = (A+B)'

Nothing complex right, simple boolean operations. Now we can see that we have converted our output function to our required format. Now our new function G = F' =  (A+B)'

Step-2: Now implement the pull-down logic first for our new function,G. Just follow two rules,

1. If two or more literals are OR-ed then the respective transistors should be parallel(Source to source and drain to drain).

2. If two or more literals are AND-ed then the respective transistors should be in series(source to drain).

Here in our example A and B are OR-ed so in the pull-down logic two transistors will be in parallel. The gate terminals of these two transistors are connected to A and B. Figure-2 shows the pull down network.

Step-3: This is the final and simple step. We have to reverse the rules of Step-2 for AND-ed and OR-ed literals and build pull up network using PMOS transistors. 

Now if we join the output of both pull-up and pull-down circuits the complete CMOS circuit is made for output function G(NOR), since we need a circuit for F(OR) we will give the output to a CMOS inverter.Thus we can implement CMOS circuits. Figure-3 shows the pull-up block and the complete CMOS circuit for function F.

So that's how we can design CMOS circuits for any function. Try for all basic gates AND, OR, XOR, XNOR, NAND, NOR and comment if you found any difficulty.

Pros and Cons of CMOS logic

CMOS logic is the most preferred logic in VLSI industry to build digital circuits because of the benefits that it provides. But as we all know nothing will come for free in the world so there are some cons also. Important point is that the pros dominate for CMOS logic. Before CMOS, circuits used to be designed using only NMOS transistors (NMOS logic,pseudo NMOS logic) but as the technology grew and the number of transistors in a chip increased power dissipated by transistors became so large that the chip was unable to handle such power. So here are the pros,

pros

• CMOS dissipate very less power compared to any other logic family.
• CMOS do not degrade output for both logic 0 and logic 1.
• CMOS circuits have very high fan-in and fan-out.
• Fabricating a CMOS chip is well established.
• CMOS cost of fabrication is very less.
• CMOS chips are very denser accumulating more number of transistors in a given silicon area.

cons

• For the same output function CMOS circuits take approximately 2 times more number of transistors than the NMOS counterpart.

That's it gyus, I hope this article have given you enough information about building CMOS circuits. feel free to post any comment or doubt in the comments section below.

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Half adder and Half subtractor explained

Addition and subtraction are two very basic operations. In digital systems the data path and sometimes the control path contains both adder and subtractor. In this article I'll try to clearly explain their operation, design and where do we use them.

Half adder

There are basically two types of adders viz. half adder and full adder same is the case with subtractors. Half adder takes two single bits as input and produces a sum and a carry output. In the below figure we show the truth table that clearly explains the operation of half adder.

From the truth table we can clearly understand that the sum output is "XOR" of inputs and the carry function is "AND" of inputs. The half adder shown here is a binary half adder as it takes only 1-bit binary values as inputs. In figure-1 we show the logic gate implementation of half adder. The sum output is "XOR" of inputs A and B, we'll also see how an XOR gate is implemented using smallest possible number of NAND gates. Try to implement XOR in a better way than this and if u succeed I'm sure you will get a Ph.D on it. Until then this is the best implementation.

The sum output of Half adder is sometimes called as quarter adder. Half adder is used to construct a full adder and it is also used in parallel adder. 

Half subtractor

Basically subtraction can also be considered as addition with one of the input being 2's-complemented. because of this similarity the truth table and equations for subtraction show a resemblance to the half adder. Half subtractor accepts two 1-Bit inputs and produces a difference and borrow outputs. The below figure shows the truth table and block diagram of half subtractor.

As said above we can see that the Difference output is same as the Sum output of half adder. But the Borrow is different from Carry of half adder. In figure-2 we'll see the implementation of half subtractor using logic gates.

The Difference output of half subtractor is called a Quarter subtractor. Half subtractor is used to construct a full subtractor. Mostly in digital circuits the subtractors are replaced with adders and one of the inputs being 2's-complemented. Subtractors are rarely used in digital circuit design.

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Pass transistor DC characteristics

Most of the logic in digital VLSI circuits is made using CMOS logic because of its low power consumption, high fanout. But there are some circuits which are made using other logics like pass transistor logic, dynamic CMOS logic etc. Though these comprise a small part of the  VLSI circuit it is necessary to understand them. In this post we will be learning about the operation and DC characteristics of pass transistor logic(PTL).

First we will see a 2x1 multiplexer design using PTL. PTL can be implemented using only NMOS or only PMOS transistors.We use NMOS PTL because the mobility of NMOS devices is more than that of the PMOS devices.Then we will understand the operation and DC characteristics of both NMOS and PMOS PTL.

2x1 Multiplexer using PTL

Truth table and output equation of 2X1 multiplexer is shown below. Now when the select line is 1 , input I1 is to be selected and when select line is 0, input I0 is to be selected as output. The main difference between a CMOS logic and PTL is that in CMOS all the inputs are connected to gate terminal only. while in PTL the inputs are connected to source terminals of the transistor. 

By connecting the select line to gate terminal and I1 to the source terminal of an NMOS transistor then the second line of truth table is implemented at the drain terminal of NMOS. To implement the first line we need inverted signal of select line so we invert it using an inverter and then connect it to the gate terminal and I0 to the source terminal of another transistor. when we connect the drain terminals of both transistors we can see that it works as a 2X1 multiplexer.

DC characteristics of PTL

DC characteristics of single NMOS/PMOS transistor:

When an NMOS transistor gate terminal is connected to VDD and the source terminal is connected to VDD the voltage at drain terminal is VDD-Vtn. This effect is called threshold drop. This happens because for an NMOS transistor to operate in on-state Vgs should be greater than Vtn. Since the source and drain terminals are identical in a FET, source and gate are at same potential so the transistor thinks that the drain terminal is its source and starts conducting. When the voltage at drain terminal tries to increase beyond VDD-Vtn transistor thinks that its Vgs is getting lessthan Vtn and the stops conducting. 

But this threshold drop will not happen when we try to drive a 0 at the source terminal. Because since the Vgs is already greater than Vtn the transistor will always be in conduction state and the entire 0 will be passed to drain terminal.

Similarly one can explain the operation of PMOS pass-transistor. PMOS can pass a 1 completely while it cannot pass a 0 completely(Vtp is produced at drain). An important point to note from here is that NMOS cannot drive a 1 completely and PMOS cannot drive a 0 completely. Because of this reason in CMOS logic the pull-down network is made using NMOS transistors and pull-up network is made using PMOS transistors.

DC characteristics of multiple NMOS/PMOS transistor:

When two NMOS are connected in series normally we expect that as we keep on addeing a transistor to the series network the voltage will drop by Vtn every time. But this does not happen because as shown in figure-3 at node A the voltage is VDD-Vtn and now this becomes the source voltage of second transistor. The second transistor now have enough Vtn difference between its gate and source terminals so the drain will charge completely to VDD-Vtn and no further drop will be seen. So no matter howmany transistors are added in series the output will be only one Vtn drop from input voltage.

Now if we connect the drain output to another NMOS gate terminal as shown in figure-4, the output voltage drops by another threshold voltage. The concept here is same since the gate terminal of second NMOS have a voltage of VDD-Vtn its drain output can only go till VDD-Vtn which is a threshold voltage less than its gate voltage. The main drawback with PTL is that the output of a logic cannot be connected as control input to other logic as the voltage levels keep degrading by a threshold every time.

The same analysis applies for PMOS PTL also. In practical designs only NMOS PTL is used. Threshold drop and DC characteristics of multiple NMOS/PMOS transistors are very important concepts.Go to CMOS inverter DC characteristics for a clear understanding of how a CMOS inverter operates.

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CMOS Inverter Voltage Transfer Characteristics

To design a digital VLSI circuit one need to have a very good understanding of the basic CMOS inverter. Once you understand the properties and operation of an inverter then we can extend the concepts to understand any other logic gate. So it is very important to have a clear idea of CMOS inverter voltage transfer characteristics.

In this post we will concentrate on understanding the voltage transfer characteristics of CMOS inverter. Though the inverter circuit looks so simple it cannot be overlooked because of its importance in the design of any digital circuit. Once we design an inverter correctly i.e. fixing width and length of transistors then we can build an entire circuit just multiplying these values by a multiplication factor(explained in later posts).

Figure-1 shows the schematic of a CMOS inverter. As we can see it have two transistors a pull-up pMOS transistor(T1) and a pull-down nMOS transistor(T2). When the input voltage Vin is equal to Vdd we get an output voltage of Vss(mostly equal to 0) and vice versa. Since it inverts the logic level of input this circuit is called an inverter. Figure-2 shows the voltage transfer characteristics(VTC) or DC characteristics of an inverter.

The VTC is divided into five regions(1-5) for easy of understanding. The above shown curve is possible when both T1 and T2 are matched for optimum operation. Optimum operation is achieved when Vin = Vdd/2 we get Vout = Vdd/2 . This can be achieved by adjusting width and length of both T1 and T2 as other parameters like mobility, oxide capacitance vary between different technologies. 

For an easy understanding of this article let us set the conditions for a transistor in cutoff,linear and saturated regions.Note that Vtn is positive and Vtp is negative in this entire article.The below table clearly explains these conditions.

Device	Cutoff	Linear	Saturated
NMOS	1. Vgsn < Vtn    Vin < Vtn	1. Vgsn > Vtn    Vin > Vtn 2. Vdsn < Vgsn - Vtn    Vout - Vss < Vin - Vss - Vtn    Vout < Vin - Vtn	1. Vgsn > Vtn    Vin > Vtn 2. Vdsn > Vgsn - Vtn    Vout - Vss > Vin - Vss - Vtn    Vout > Vin - Vtn
PMOS	1. Vgsp > Vtp    Vin- Vdd > Vtp    Vin > Vdd + Vtp	1. Vgsp < Vtp    Vin < Vdd + Vtp 2. Vdsp > Vgsp - Vtp    Vout - Vdd > Vin - Vdd - Vtp    Vout > Vin - Vtp	1. Vgsp < Vtp    Vin < Vdd + Vtp 2. Vdsp < Vgsp - Vtp    Vout - Vdd < Vin - Vdd - Vtp    Vout < Vin - Vtp

Since we have build a platform lets understand all the regions of the characteristics one by one.

Region-1

In this region the input is in the range of (0,Vtn). Since the input voltage is less than Vtn, the NMOS is in cutoff region. No current flows from Vdd to Vss, The entire Vdd will appear at the Output terminal. 

• NMOS is in cutoff as Vgs < Vtn
• PMOS is in linear as Vgsp < Vtp and Vdsp > Vgsp -Vtp.
• Zero current flows from supply voltage and the power dissipation is zero.

Region-2

In this region the input is in the range of (Vtn,Vdd/2). Since the input voltage is greater than Vtn the NMOS is conducting and it jumps to saturation as it has large Vds across it(Vout is high). PMOS still remains in the linear region.

• NMOS is in saturation as Vgs > Vtn and Vout >Vin - Vtn.
• PMOS is in linear region as Vdsp > Vgsp -Vtp.
• since both the transistors are conducting some amount of current flows from supply in this region.

Region-3

In this region the input voltage is Vdd/2. At this point the output voltage is also Vdd/2 as one can see in figure-2. At this voltage both the NMOS and PMOS are in saturation and the output drops drastically from Vdd to Vdd/2. At this point a large amount of current flows from the supply. Most of the power consumed in CMOS inverter is at this point. So care should be taken that the Input should not stay at Vdd/2 for more amount of time.

• NMOS is in saturation as Vgs > Vtn and Vout >Vin - Vtn.
• PMOS is in saturation as Vgsp < Vtp and Vdsp < Vgsp -Vtp.
• Large amount of current is drawn from supply and hence large power dissipation.

Region-4

In this region the input voltage is in the range of (Vdd/2 , Vdd-Vtp). Here the PMOS remains in saturation as Vout < Vin - Vtp and Vgsp < Vtp. But the NMOS moves from saturation to linear region since the drain to source voltage now is less than Vgsn-Vtn.

• NMOS is in linear as Vgs > Vtn and Vout < Vin - Vtn.
• PMOS is in saturation as Vgsp < Vtp and Vdsp < Vgsp -Vtp.
• A medium amount of current is drawn as NMOS is in linear region and power dissipation is low.

Region-5

In this region the input voltage is in the range of (Vdd-Vtp,Vdd). Here the PMOS moves from saturation to cutoff as the Vgsp is so high that Vgsp > Vtp. The NMOS still remains in linear as the drain to source voltage now is less than Vgsn-Vtn.

• NMOS is in linear as Vgs > Vtn and Vout < Vin - Vtn.
• PMOS is in cutoff as Vgsp > Vtp.
• Zero current flows from the supply and so the power dissipation is zero.

Now that we have clearly understood the voltage transfer characteristics and operation of an NMOS, we will discuss how to alter the transfer characteristics of any CMOS gate in the next article.

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Analog VLSI Vs Digital VLSI

VLSI is the current trend of manufacturing electronic integrated circuits. As we know that there are two divisions of electronic circuits(analog and digital) VLSI also have this division. In this article we will have a brief introduction about VLSI and then explain the differences between Analog VLSI and Digital VLSI in all aspects like design,testing,and application.

VLSI

An IC(Integrated Circuit) consisting of a large number of transistors, usually in the range of around 10 K to 1 Billion is called a VLSI circuit. The invention of Planar Technology for fabrication of transistors on a silicon wafer made VLSI circuits possible today. The fabrication techniques are improving every year minimizing process steps,leakage and shrinking transistor size even further. All these help in building power efficient,fast and reliable electronic circuits. Below shown is intel's core-i7 processor chip, it contains 700 Million transistors in just 1.5x1.5 square inches of silicon area.

Analog VLSI

Design aspects:

• It is comparatively difficult to design an analog VLSI circuit than a Digital VLSI circuit.
• Design of circuit is mostly manual.
• It cannot be described using a HDL(Hardware Descriptive Language).
• Analog modules are separated from the entire design because they need separate ground.
• Transistors are operated in linear and conduction regions.
• Transistors used are a bit larger than that used for digital circuits and run at a higher supply voltage.
• Design is not necessarily a CMOS design.

Testing aspects:

• It is difficult to test the circuit because in real system noise affects more and you cannot inject noise directly while testing the circuit.
• Phase delays also effect the circuit operation.

Application aspects:

• Only a small portion of an electronic circuit will be analog as their operation is highly affected by noise.
• These are mostly used for high speed amplifiers in communication.
• Used in ADCs(Analog to Digital Converters).
• Used at the modems,RF-receiver of mobile phones.

Digital VLSI

Design aspects:

• Mostly the design is automated and HDLs are used to describe the design.
• Transistors are much smaller and operate at lower supply levels than analog circuits.
• Transistors are operated in saturation(ON) and cutoff(OFF) regions.
• Regeneration of signal is easy so long wires is not a big problem for digital circuits.
• Design is mostly CMOS which have less power dissipation, high density, low cost and easily fabricated.

Testing aspects:

• Circuit can be tested exhaustively giving all possible inputs increasing reliability.
• Testing is easy and automated.
• Phase delays and noise do not affect the system operation.
• Failure conditions can be determined easily.
• The delays have to be analyzed correctly so that the setup and hold time violations do not happen.

Application aspects:

• Majority of the system is digital.
• Processors and microcontrollers are digital circuits.
• Used almost in all areas of application.

These are the major differences between Analog and Digital VLSI circuits.Did you find I missed any point? Please comment below and help me and my readers.

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Combinational circuit Vs Sequential circuits

Digital circuits are basically divided into two types, viz. combinational circuits and sequential circuits. Almost all the digital systems use both of these circuits. Both these classes of circuits have properties different from eachother while there are some similarities also. To design a digital system efficiently, one should understand these classes properly. It is compulsory for a digital design engineer to have the basic understanding and only then he will be able to design a complete system for a given specifications.

In this article I will explain these two categories of digital circuits in detail comparing their similarities and differences by giving relevant examples. Once you understand the advantages of each of these categories it will be easy to decide when to use each of them.

Combinational Circuit:

"Combinational circuit is a digital circuit whose output at any given time depends only on one or more inputs present at that particular time and nothing else."

The following are the properties of combinational circuits,

• It is represented by a truth table of output for all possible inputs.
• Normally the output function is represented in either SOP(sum of products) form or POS(product of sums) form.
• It is a time independent logic and hence we don't need a clock for the proper operation of a combinational circuit.
• There is no feedback from output to input.
• Combinational circuits form the DataPath of a digital system.
• Some of the combinational circuits are Multiplexres,Encoders,Decoders,Adder,Subtractor,code converters etc.
• The only memory that can be designed using combinational logic is ROM(Read Only Memory).
• Combinational circuits are designed by K-Map minimization of output function and are implemented using logic gates..

Sequential Circuit:

"Sequential circuit is a digital circuit whose output at any given time depends on inputs present at that particular time and previous outputs"

The following are the properties of sequential circuits,

• It is represented by a truth table of present output for all combinations of input and previous outputs.
• Normally the output function is represented in either SOP(sum of products) form or POS(product of sums) form.
• It is a time dependent logic and a clock input is required for identifying and differentiating the present and previous outputs.
• Sequential circuits need memory to store the previous outputs and even a memory is a sequential circuit.(May be a bit confusing but will be clear once we discuss sequential circuits.)
• Some examples of sequential circuits are Latches,Flipflops,Counters,Registers.
• Almost all the memories are made of sequential elements(flipflops).
• Sequential circuits form an integral part of the ControlPath of a digital system.
• Sequential circuits are designed using K-Map minimization of output function and FSM(Finite State Machine). Implementation of sequential circuits is done using logic gates.

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What,why and where of Digital VLSI circuits.

Today's electronics is completely filled with digital components and we call this "The Digital age". No matter what is the area of application, digital devices have their share. Major part of electronics is now digital. Earlier there were analog computers and they have been removed from the face of earth, once digital computer era started. Slowly one after another all analog electronic machines are converted to digital and thus began the digital revolution.

Though the real world in which we live is analog, why is a digital device dominating? Humans understand an analog signal(we can't interpret binary 1's and 0's as good as analog signals) far better than a digital signal and still they prefer a digital machine to do the job. Why is digital electronics so popular?

In this article I would be addressing all these questions forming a strong base towards why we need digital systems. However there are some places where an analog system works much better than a digital system, I am only trying to make a point that digital systems are a major part of electronics industry today and to survive in such an industry it is compulsory to understand the basics of Digital systems and how to design them.

Q1. What is a Digital VLSI Circuit?

"An electronic circuit that operates on digital inputs to produce the required digital output is called a digital VLSI circuit." 

Though the definition seems very simple but there is a lot to understand from it.

• Firstly it is an electronic circuit i.e. the active device behavior is determined by the direction of flow of electrons inside them. 
• It operates on digital inputs but not on analog inputs. A digital circuit only understands two voltage levels,one is the supply voltage(logic high normally called VDD) and the second is the ground(logic low,normally called VSS). Any intermediate value is considered an undermined value and the circuit will not work as expected for these values. 
• Finally it can only produce digital outputs.

Q2. Why we use digital VLSI circuits?

Though the real world we live is completely analog, digital machines are dominating because of the invaluable benefits they provide. The most important invention of mankind is computer, it changed the world as no one would ever imagine. We are able to do millions of calculations in a fraction of a second, which enables us to do tremendous things like understanding the universe, diagnosing a person for disease, security and lot more. All this is made possible because of computers and more  importantly a digital VLSI circuit. So the basic advantages and features of a digital VLSI circuit are,

• Does both numerical and non-numerical information processing very easily.
• Very high noise immunity.
• Easy to design, and the design can be automated(EDA tools and HDLs).
• Low cost(involvement of manpower is low).
• It is very easy to duplicate similar circuits with least performance difference.

Well these are the basic advantages and one can find a lot more. 

Q3. Where do we use digital VLSI circuits? 

As said earlier the real world we live is analog and we are talking about digital systems which accepts only digital data as input. For any electronic system the input will come from real world so we need a circuit that can convert the real world analog signals into digital signals and feed them to the digital circuits. Now the digital circuit process the data and returns the result to a circuit which converts the result back to analog. Any electronic device you take this will be the flow.

The following diagram shows the block diagram of any electronic system.

Consider a digital audio system. The input is analog signal(audio from mic) it is then converted to digital and then operated on for noise removal volume,bass and treble are adjusted then converted back to analog signal(speaker).

So what ever is the area of application, digital circuits are used every where. Some examples of application fields are, communication, security,mobiles,space applications,health and treatment,education,defense,etc. 

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Digital Design

To master VLSI design the very first thing to understand is the basic building blocks of digital design. Once the building blocks are known and well understood, anybody can design a system for the given specifications. This section takes you through the building blocks first, then how to design an efficient system using these blocks.

Basically there are two types of digital circuits,

1. Combinational circuits.
2. Sequential circuits.

Mostly a digital system consists of both combinational and sequential circuits. So it is compulsory to understand both of them and how to use them in a design. The flow of a digital system design is as shown below,

1. Read the problem definition.(specifications).
2. Find the number of inputs and outputs required.
3. Prepare a truth table for each output in terms of one or more inputs.
4. Translate the truth table to boolean equations.
5. Minimize the boolean equations.
6. Implement the design using any HDL(Hardware Descriptive Language).

So let's go to the contents we will be discussing. This is divided into sections, the first section is for beginners in digital design however this section can be skipped for people who have taken any basic course on digital design.

Sections III and IV are very important for designing and optimizing a system for performance, throughput and robustness.

Section-I

• Boolean Algebra.
• Gate level minimization.

Section-II

• Adder and Subtractors.
• Multiplexer,Demultiplexer,Codeconverters,Decoders and Encoders.
• ROM
• Flipflop and applications.

Section-III

• System design
• Data path design.
• Control path Design and Optimization.

Section-IV

• Metastability.
• Pipelining and Parallelism.
• Power and Clock gating.

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